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3D Networks-on-Chip Architecture Optimization for Low Power Design
Michael Opoku Agyeman
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Dive into the research topics of '3D Networks-on-Chip Architecture Optimization for Low Power Design'. Together they form a unique fingerprint.
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Engineering & Materials Science
Network-on-chip
100%
Routers
28%
Electric power utilization
21%
Routing algorithms
15%
Communication
14%
Embedded systems
13%
Energy efficiency
11%
Wire
11%
Degradation
10%
Throughput
10%
Topology
10%
Data storage equipment
8%
Costs
5%