TY - CONF
T1 - Pitfalls in Low Voltage LED Drivers Design using Tapped-Inductor Converters
AU - Rico Secades, Manuel
AU - Garcia, Jorge
AU - Torres Perez, Angel
AU - Cardesin, Jesus
AU - Calleja , Antonio J.
PY - 2007/11/5
Y1 - 2007/11/5
N2 - The use of power LED is growing continuously, due to new advances and new devices with performances which increase day after day. Nowadays, a topic of interest in this context is the search for electronic converters in order to take advantage of LED performances. LEDs ballast design involves a multidisciplinary knowledge: photometric, thermal, power electronics and control techniques. This work focuses in to save potential pitfalls during ballast design for these new components. This paper evaluates the use of tapped-converters as LED drivers in low voltage applications. These topologies are derived from tapped- inductor DC-to-DC converters, in which the load is a connection of power LED. This load implies several restrictions in both power topology design and control method strategies. The work includes an extensive discussion about this topic, clarifies areas of application for each specific topology and includes a complete design example.
AB - The use of power LED is growing continuously, due to new advances and new devices with performances which increase day after day. Nowadays, a topic of interest in this context is the search for electronic converters in order to take advantage of LED performances. LEDs ballast design involves a multidisciplinary knowledge: photometric, thermal, power electronics and control techniques. This work focuses in to save potential pitfalls during ballast design for these new components. This paper evaluates the use of tapped-converters as LED drivers in low voltage applications. These topologies are derived from tapped- inductor DC-to-DC converters, in which the load is a connection of power LED. This load implies several restrictions in both power topology design and control method strategies. The work includes an extensive discussion about this topic, clarifies areas of application for each specific topology and includes a complete design example.
U2 - 10.1109/ISIE.2007.4375091
DO - 10.1109/ISIE.2007.4375091
M3 - Paper
ER -