Towards Reliability and Performance- Aware Wireless Network-on-Chip Design

Michael Opoku Agyeman, Kin-Fai Tong, Terrence Mak

Research output: Contribution to ConferencePaperpeer-review

Abstract

Recently Hybrid Wired-Wireless Network-on-Chip (WiNoC) has emerged to solve the poor scalability and performance issues of modern System-on-Chip (SoC) design. However, conventional on-chip wireless interconnect has a high error rates which have drastic effects on the total reliability of the WiNoC. In this paper, we propose an improved wireless interconnect fabric that is able to achieve a similar error rate as traditional wireline channels as an effort to improve the overall reliability of WiNoCs. A novel transducer is designed to launch surface wave signals into a commercially available thin metal conductor coated with a low cost dielectric material to generate wireless signals with high signal strength. Experimental results show that, for a 60GHz center frequency, the proposed communication fabric can achieve an operational bandwidth of about 60GHz. Compared to existing WiNoCs, the proposed communication fabric can improve the reliability of WiNoCs with average gains of 21.4%, 13.8% and 10.7% performance efficiencies in terms of maximum sustainable load, throughput and delay, respectively.

Other

OtherIEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS)
Abbreviated titleDFTS
CountryUnited States
CityAmherst
Period12/10/1514/10/15
Internet address

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